What Today’s Advances in Radar Technology Mean for Testing and Training

An F-18 Super Hornet fighter jet in-flight. (Image: Mercury Systems)

As radio frequency (RF) and digital hardware have advanced over the years, radar capabilities have progressed to provide higher resolution, greater tracking ranges and higher frequency agility as well as data processing and electronic counter-countermeasures (ECCM) for protection. Technology advancements in RF, digital hardware, active electronically scanned arrays (AESA), synthetic aperture radar (SAR) and cognitive electronic warfare (cogEW) have necessitated advances in test and training systems.

RF Advancements

Forty years ago, the state-of-the-art radar technology used in fighter aircraft was traveling wave tube amplifiers (TWTAs) at X-band frequencies to generate the transmit power needed to support the desired detection range. These TWTAs created kilowatts of low-duty cycle power but required waveguide conductors from the TWTA output port to the antenna input port to minimize insertion loss from the TWTA to the antenna.

The radar antenna was gimbal mounted to provide rotation in azimuth and elevation. Unfortunately, using waveguide to pass RF signals through a gimbal required a complicated rotary joint, which limited the number of simultaneous RF channels that could be supported to a maximum of two. These two channels were split again and timeshared between two of the four antenna sub-channels.

Today, transmit-receive modules (TRMs) comprised of monolithic microwave integrated circuits (MMICs) are positioned in an array to form an AESA. This array replaces the TWTA, waveguide, mechanical gimbal and the antenna with a single unit. Other RF componentry performing the function of much larger RF up/down converter chains, such as low noise amps (LNAs), phase shifters and attenuators, are added, but have been miniaturized to the chip level for mounting on printed circuit boards (PCBs).

The test and training world adapted to these new technologies by incorporating the same PCB-based chips into up and down converters and other RF conditioning blocks. This miniaturized technology is also exploited in more demanding environments for electronic countermeasures (ECM) and jammer training pods with tight size, weight and power (SWaP) constraints.

In the early 1980s, radar signal and data processing consisted mostly of thousands of custom application-specific integrated circuits (ASICs) connected to central processing units (CPUs) on multiple card sets. These ASICs had very limited programmability leading to costly development cycles. Analog-to-digital conversion (ADC) and digital-to-analog conversion (DAC) technology clock rates were in the 10 MHz to 60 MHz range and were digitized using 11-bit to 6-bit converters, respectively.

Tradeoffs were made between bandwidth and signal-to-noise ratio (SNR) to achieve radar detection ranges. Today, single-die system on chip (SoC) technology, consisting of field programmable gate arrays (FPGAs) and hard processor systems (HPSs) connected with high bandwidth memory (HBM), has replaced many of the ASICs. This new technology enables much higher data rates and faster development cycles, while providing vastly increased computing resources. Current generations of signal processing boards provide multiple channels with ultra-fast data conversion rates of 64 giga-samples per second (GSPS), enabling wider bandwidth sampling at RF frequencies up to Ka-band. This technology is being integrated into the latest generation of test and jammer products to stay abreast of radar advancements.

Figure 1. Developments like the Model 5560 are integrating high-bandwidth memory with innovative FPGA processing technology for a highly specialized architecture applied across radar testing and simulation. (Image: Mercury Systems)

Directly integrated with the on-chip AMD Xilinx Versal® HBM via the Versal Programmable Network-On-Chip, Mercury’s Model 5560 serves as an example of the evolution in high-bandwidth data processing. Many existing defense systems using FPGAs as co-processors to accelerate data processing at the edge run into bottlenecks when data is transferred to memory positioned elsewhere on the board, which delays decision making. The architecture of the Model 5560 results in an up to 8x increase in bandwidth and 63 percent lower power compared to a system using external memory.


In the 80s and 90s, AESA prototypes matured to production levels for combat aircraft. AESA radars originally consisted of a slotted planar array of thousands of TRMs, which were phase aligned and attenuated to generate beam patterns that steered at any angle from 0° off boresight to +/- 60° in azimuth and elevation. No mechanical movement was necessary, eliminating the cumbersome gimbal and waveguide rotary joints. Additionally, new, advanced radar modes were enabled with beam steering on a pulse-to-pulse basis as well as with simultaneous beams in far greater number than the four supported by the mechanically scanned antenna.

Rather than time-sharing, the simultaneous transmission of multiple RF signals gave the data processor the ability to process all of the beams at the same time and increased the number of targets tracked by the radar. The AESA increased range detection through higher combined power, higher SNR and better antenna directivity using the array.

This architecture also enabled new ECCM modes by increasing the instantaneous bandwidths (IBWs), the bandwidth available for processing, and increasing the frequency agility of the radar signal. Agility allowed the radar to change frequency in smaller and smaller pulse groupings, even including down to a pulse-to-pulse basis. Additionally, the number of pulses increased to the point of multiple simultaneous pulses from the same array.

These AESA advancements placed new requirements on the radar environment simulators (RES) used to test radars. To handle frequency agility, simulator providers originally incorporated fast-frequency detection algorithms and rapid RF signal path switching to keep pace. The advent of direct-to-digital RF sampling technology allows a new strategy. Extreme sampling rate ADC/DACs with high bit depths enable greater than 1 GHz IBWs up to Ka band frequencies. This transformative technology enables staring architectures that do not rely on chasing the signals across the frequency band. The higher bit depth of these new devices enables detection of multiple simultaneous pulses that differ in power level.


Synthetic aperture radar mapping modes incorporated into combat aircraft in the 1950s enabled radars to map ground and sea-based targets previously hidden by ground returns. Since then, improvements have included higher pixel counts, finer resolution and clarity, ground moving target indicator/track (GMTI/GMTT), automated target recognition (ATR) and other post-processing products.

SAR testing in the past was limited to out-the-window testing or simplistic optical delay lines providing a point target response. Verifying SAR required expensive flight testing. With advancements in parallel processing capabilities, it is now possible to simulate high-fidelity realistic ground returns in a laboratory environment. In addition to generating full resolution images on a cockpit display, it is also now possible to embed detailed ground targets within the imagery to test advanced modes, including ATR, GMTI and GMTT.


Cognitive electronic warfare is the latest advancement in radar jammer technology. In the past, threat libraries were created and maintained based on observed radar waveform characteristics obtained from signal intelligence. Pulse-to-pulse radar signal updates that change signal characteristics render these conventional static rules-based responses ineffective. This is sometimes referred to as the software defined radar. To address this new capability, modern test systems and reactive jammers had to revolutionize to identify and classify signals based on non-waveform specific characteristics and cognitively generate libraries based on observed data in near real time.

Integrating cognitive EW in test and training systems requires both an update to the digital signal processing hardware and new software architectures. The hardware requirements follow the requirements for AESA described above. The software requires the ability to cognitively identify the simultaneous radar modes of operation to provide sufficiently challenging targets to train and test against. Furthermore, new methods are required to test and validate the efficacy of the cogEW test and training platform itself.

The characteristics of test equipment and procedures used with cognitive systems are expected to push the boundaries of current test systems. The test system must not only provide data that represents the tactical environment with unprecedented fidelity, but frequently it must also include closed loop behavior that is representative for that tactical environment. In other words, the test system must be a cognitive system to test a cognitive radar system!

Finally, we note that cogEW systems, like all cognitive systems, are heavily data-driven. An example of this is the use of neural nets that require training with high fidelity representative data sets. The generation of such - ideally standardized - data sets for cognitive EW development, test and evaluation is an ongoing challenge. This will likely require state-of-the-art software-defined test equipment aligning with the radar itself.

Innovations being developed are helping condition aircrews to evolving threat scenarios and better prepare pilots for real combat. Built with validated digital radio frequency memory (DRFM)-technology, Mercury’s mPOD is a rapidly reprogrammable electronic attack (EA) training system using commercial technology. Having successfully completed flight testing, the mPOD will be used to train pilots in mock air-to-air combat with other pilots operating as adversaries using realistic, nearpeer jamming capabilities.

Figure 2. The mPOD is a rapidly reprogrammable EA training system used to train pilots in mock air-to-air combat with other pilots operating as adversaries using realistic, nearpeer jamming capabilities. (Image: Mercury Systems)

The pod can be attached to any aircraft weapon’s pylon or integrated internally within the aircraft to reduce drag and maintain aircraft performance. A scalable, modular design with six swappable, high MTBF (mean-time-between-failure) hardware components, including a wideband antenna, the mPOD decreases overall sustainment cost, as well. (Figure 2)

Continued Path Forward

In much the same way that signal processing advancements and software defined functionality have enabled the sweeping societal changes within the information age, these same advancements enabled revolutionary changes in radar capability. Testing and training the operators of these cognitive, wide bandwidth and massively parallel target tracking devices requires the advances described herein to test and jam these systems. The application of innovative technology, algorithms and methods is the key to enabling our warfighters to employ these tools and accomplish the mission.

This article was written by Joe Styzens, Director Test Product Line and Dennis Ternet, Systems Architect Engineer, Mercury Systems. For more information, visit here .