Design Approaches for Established and Emerging RF Receiver Architectures

Traditionally, heterodyne architectures have been the preferred choice for radio frequency (RF) and millimeter-wave (mmWave) receiver architectures, excelling in noise performance, dynamic range, frequency coverage, selectivity, and reduction of EMI. However, recent advancements in high sample rate analog to digital converters (ADCs) and embedded signal processing have prompted a reassessment of both architectures. A thorough examination of the components in the channel design is essential to minimize distortion into the differential ports of the ADC, guaranteeing optimal signal integrity and dynamic bandwidth for the system. This article will overview the design approach as well as when to use a particular component type depending on performance and signal requirements.

Comparison of the Direct Sampling and Heterodyne Architecture

The development of high sample rate ADCs, broadband high frequency components, and embedded signal processing has enabled the development of direct sampling RF receivers. In this architecture, the RF signal is sampled directly and is down converted digitally by the ADC without the intermediary step of analog down conversion via a mixer. This brings several advantages. First and foremost, the elimination of mixer stages results in a simpler to implement signal path with fewer components in the RF chain, reducing the overall receiver complexity, translating into benefits such as reduced power consumption. A smaller system allows for utilization of more channels on the ADC, which increases the processing power of the whole system.

However, challenges arise, including heightened susceptibility to interference due to the absence of filtering at a fixed low frequency IF, requiring advanced filtering and shielding. Additionally, limitations in dynamic range, especially at higher frequencies, pose challenges for direct sampling architectures, narrowing the gap but facing inherent constraints compared to heterodyne architectures.

In contrast, heterodyne RF receivers rely on a mixer to down convert the RF signal to a lower intermediate frequency (IF), offering improved selectivity, dynamic range, and effective rejection of unwanted signals.

Figure 1. Simplified direct sampling vs heterodyne receiver architectures.

The conversion to an IF significantly enhances signal processing. It establishes a stable and standardized processing frequency, enabling the use of lower frequency, simple to integrate fixed filters for a narrower band. This is crucial for isolating the desired signal in crowded RF environments. Additionally, signal amplification and gain control are more efficiently executed at the IF, minimizing the impact of noise and interference. Furthermore, because you are grouping up and down converting the spectrum to a fixed and low IF frequency for processing, ADC requirements have changed such that you can use a lower frequency, higher linearity ADC, offering a clearer and more organized view of your spectrum.

Heterodyne architectures will typically be the choice for ultra-broadband, high frequency RF and mmWave systems where one needs to sample signals above the ADC sampling range or where high selectivity and sensitivity is demanded, such as in EW scanners or precision test equipment.

Component Selection and Channel Design

To understand the RF signal chain, let’s examine its blocks:

  • RF Front End

  • Signal Conditioning

  • Frequency Conversion

  • Analog Front End/Data Converter Interface

In modern multi-antenna, multi-channel systems, a versatile RF Front End is crucial. Comprising a limiter and a low-noise amplifier (LNA), the limiter, typically the first component after the antenna, shields the LNA and subsequent stages from high-power signals, preventing damage and nonlinear distortions. Maintaining low signal levels is vital to preserve sensitivity and ensure linear operation. Key limiter considerations include insertion loss, flat leakage, spike leakage, and recovery time, requiring engineers to balance protection and minimize impact on desired signals.

Following the limiter, the next challenge is to amplify the incoming signal without distortion using a high-linearity, broadband LNA with sufficient gain. Since the RF Front End may handle multiple channels, opting for a broadband component is necessary. Ideally, the LNA should amplify the signal level without distortion. However, as the LNA manages multiple channels concurrently, strategic switching of the amplifier may be necessary based on the incident spectrum to maintain linearity in the signal chain. Positioned at the front end, a low noise figure is crucial to maintain a high signal-to-noise ratio (SNR), while a high flat gain enhances cascaded noise figure and dynamic range without compromising any AM information.

Signal Conditioning

With the receiver protected and the incident signal boosted distortion-free, the next challenge is to prevent adjacent signals from obstructing the detection of the desired tone. This block comprises a filtering stage, automatic gain control, and equalization to address frequency-dependent losses.

Figure 2(a). Direct sampling system channel design vs (b) Heterodyne system channel design.
Figure 2(b). The RF Front End signal path.

For receivers operating across multiple frequency bands or adapting to changing frequency requirements, a highly configurable filter (e.g., tunable filter, switched filter bank, or switched capacitor bank) proves advantageous. Key considerations for a configurable filter include out-of-band rejection, rejection steepness, passband insertion loss, switching time, and control logic. For applications demanding high channel counts, factors such as size, weight, power (SWaP), and repeatability should be taken into account. In such scenarios, MMIC filters are an ideal solution, offering substantial size reduction with high repeatability from unit-to-unit.

After selecting the channel, providing variable gain/attenuation and equalization becomes imperative. The variable attenuator and variable gain amplifier (i.e. automatic gain control - AGC), serve as a feedback mechanism to adjust the signal level to an optimal power range for usability without causing damage to subsequent stages. Following AGC, an equalizer is employed to level out a signal affected by frequency-dependent losses.

Frequency Conversion

This block is specific to heterodyne architectures and utilizes a mixer block to convert the RF signal to a lower IF signal, enhancing selectivity by allowing easier filtering of unwanted signals outside the converted IF range. However, using a mixer introduces complexities. It requires a local oscillator (LO) signal, necessitating additional components like multipliers, filters, and an LO driver amplifier to generate and amplify the LO for proper mixer operation. There’s a risk of LO signal leaking into the IF output, contributing to distortion. Conversion introduces signal losses, and as mixers are built from nonlinear devices such as diodes or transistors, their operation can introduce harmonic distortion and intermodulation products, reducing system dynamic range. When choosing a mixer, considerations should include bandwidth, conversion loss, isolations, and linearity.

Figure 3. The signal conditioning signal path.

In direct sampling architectures, the RF signal is digitized without analog down conversion, bypassing mixers and their associated distortions and losses. While direct sampling simplifies the signal path, it shifts some distortion challenges to the ADC interface.

Analog Front End/Data Converter Interface

The aim of this block is to optimize headroom for maximum linearity at the differential ADC interface. The differential interface enhances the data converter’s dynamic range by rejecting common mode noise, reducing the noise floor, and minimizing second harmonic distortion.

Achieving this involves a low-loss single-ended to differential mode converter and a broadband match to the ADC. This block consists of either a passive balun or a differential amplifier for mode conversion, feeding into a differential limiter and a differential resistive matching circuit. The choice between a balun or differential amplifier depends on the application. For applications requiring more power gain from the mode converter, a differential amplifier is likely needed, with trade-offs of added noise, degraded linearity, and increased system complexity. This is suitable for low-bandwidth applications. In contrast, for broadband, high-linearity systems, a passive balun offers the best wideband performance in terms of balance, noise, linearity, and simplicity.

Figure 4. Frequency conversion block for heterodyne architectures.

After selecting a mode converter, matching it to the ADC is crucial to avoid introducing second-order harmonic distortion (HD2) as the match can affect the performance of the mode converter, reducing dynamic range. Designing this matching circuit involves a tradeoff between return loss and bandwidth. Given the requirement for a broadband match and the impossibility of achieving this lossless, a resistive match is needed to stiffen impedance, reduce passband ripple, and enhance mode converter performance. Finally, as a protective measure, a differential limiter is placed before the data converter to protect the expensive ADC from any jamming tones that may have made it all the way to the ADC interface.

Figure 5. ADC Interface signal path.

In the context of direct sampling receivers, the development and availability of high frequency broadband baluns is enabling the usage of high sample rate ADCs.


The simplicity and cost reduction enabled by direct sampling receivers are ultimately the goal for modern RF systems but have their limitations. Direct sampling architectures simplify the signal path, digitizing RF signals without implementing a mixer for down conversion. This streamlined design reduces power consumption, enhances portability, and potentially lowers costs. Yet, challenges arise, including susceptibility to interference, limited dynamic range at higher frequencies, and a shift of distortion challenges to the ADC interface.

Each block of the signal chain and the inherent challenges discussed become more difficult at higher frequencies. For frequency plans that prevent the use of direct sampling, heterodyne architectures excel in noise performance, dynamic range, leveraging mixers for down conversion. This approach offers standardized frequency processing, effective filter designs, and optimized gain control at the intermediate frequency. However, it introduces complexity, potential signal distortion, LO signal leakage, and increased power consumption.

The choice between these architectures necessitates a delicate balance, weighing the proven track record of heterodyne architectures against the streamlined simplicity of direct sampling. Engineers must consider application-specific needs and performance requirements, making decisions based on the unique trade-offs inherent in each approach. Ultimately, the optimal choice depends on a thorough analysis of the advantages and drawbacks of each architecture within the context of the application’s demands.

This article was written by Cameron Sheth, Product Manager, Marki Microwave. For more information, visit here .