Design Software Supports BAE System’s Mixed-Signal Chip Design
BAE Systems is a global defense and aerospace company, delivering products and services for air, land, and naval forces, as well as electronics, information technology solutions, and customer support services. In partnership with AWR Corp. (El Segundo, CA), MIT, Cornell University, and Alcatel-Lucent Bell Labs, BAE Systems has been working to produce a new breed of devices that embeds photonic devices into silicon- based integrated circuits (ICs), enabling computer chips to perform digital, radio frequency, and photonic functions in a single chip.
The Electronic and Photonic Integrated Circuits (EPIC) program is funded by the Defense Advanced Research Projects Agency (DARPA) to produce a mixed-signal electronic/photonic application. The research is being built on by Alcatel-Lucent Bell Labs, which demonstrated the first CMOS silicon-based tunable optical waveguide equalizer, a major step toward high-density, low-cost silicon chip-based optical networking devices.
BAE Systems is taking a mature electronics process in complementary metal oxide semiconductor (CMOS) and adapting it to add complex photonics functions ranging from the photonic processing of massive amounts of RF bandwidth, to extremely high-speed digital interconnects. The company has developed a range of monolithically integrated CMOS-compatible photonic devices including ultra-low-power-consumption silicon ring optical modulators, fourth-order narrowband optical filters with tunable passbands and center wavelengths, and silicon-germanium (SiGe) waveguide photodetectors. The design of these mixed-signal chips is extremely complex, and accurate behavioral models are key to developing and producing high-quality performance at a reasonable cost.
BAE Systems uses the Analog Office® RF integrated circuit design suite from AWR Corp. to develop RF and microwave photonic applications, and AWR provides consulting services for the development of models and process design kits (PDKs). AWR has been working closely with photonics designers at BAE Systems and Bell Labs to develop accurate behavioral models based on the EPIC data. The two teams are also working together to create a PDK that will enable accelerated silicon tape-out of the photonics chips. In addition, AWR’s Analog Office software is being used to extract the models.
The integrity of the electrical and physical model data is often an issue between foundry customers, foundries, and EDA vendors. The PDKs are customized for the AWR open design platform with its unified data model, and carefully developed from supplied technology files, device models, and design rules specifically for Analog Office.
The Analog Office design suite is specifically architected and optimized from the ground up for next-generation radio-frequency integrated circuit (RFIC) designs. Designers of RFICs and analog ICs use the software to control and integrate tools to capture, synthesize, simulate, optimize, lay out, extract, and verify RFIC and analog designs from the system level through to final tape-out. The integrated environment features concurrent interconnect-driven and RF-aware design methodology for interactivity and accuracy. The solution is built on AWR’s open high-frequency design platform. AWR PDKs are subjected to an extensive level of validation at both cell and circuit level to ensure quality and conformance to best-in-class design methodologies for high-frequency RFIC designs.
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