FPGA

Microsemi Corp. (Aliso Viejo, CA) has introduced the SmartFusion®2 system- on-chip (SoC) field programmable gate array (FPGA). SmartFusion2 integrates flash-based FPGA fabric, a 166 megahertz (MHz) ARM® Cortex™-M3 processor, security processing accelerators, DSP blocks, SRAM, eNVM, and communication interfaces on one chip. SmartFusion2 provides a root-of-trust device with secure key storage capability using the physically unclonable function (PUF) key enrollment and regeneration. Users may also leverage built-in cryptographic processing accelerators including: advanced encryption standard (AES) AES-256, secure hash algorithm (SHA) SHA-256, 384 bit elliptical curve cryptographic (ECC) engine, and a non-deterministic random bit generator (NRBG).

SmartFusion2 devices are available with a range of density from 5K LUT to 120K LUT, plus embedded memory and multiple accumulate blocks for digital signal processing (DSP). High-bandwidth interfaces include PCI Express (PCIe) with flexible 5G SERDES, along with highspeed double data rate DDR2/DDR3 memory controllers. The device also includes a microprocessor sub-system (MSS) with a 166 MHz ARM Cortex-M3 processor, on-chip 64KB eSRAM, and 512KB eNVM.

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Defense Tech Briefs Magazine

This article first appeared in the December, 2012 issue of Defense Tech Briefs Magazine (Vol. 6 No. 6).

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