Magnetic Random Access Memory Integrated Passive Components
Radiation-hard, nonvolatile memory used in strategic parts of electronic systems offers increased responsiveness and reduced power consumption.
An embedded magnetic memory technology was developed to be integrated into a Complementary Metal Oxide Semiconductor (CMOS) circuit fabrication process to provide radiation-hard logic elements and small random access memories. The goal was not to provide large scale, bulk memory, but latches and flip-flops that serve as state and data registers for sequential logic, and configuration registers for configurable logic. The benefits include the ability to power down a subsystem while retaining system state, thus saving energy until the subsystem is required. The subsystem can then be powered up and begin operating in milliseconds.
The technology is based on a unique, PacMan-shaped magnetic tunneling junction (MTJ) cell. The focus of this research was to refine the PacMan cell to make it practical for integration into CMOS circuits, to develop CMOS circuits that employ the magnetic cells, and to integrate the cells onto a CMOS process. The procedure produced two circuit designs based on magnetic memory elements: a magnetic latch and a magnetic shadow memory to serve as a backup to volatile electronic memory.
The second thrust of this research was to develop new families of on-chip passive components, particularly inductors and programmable resistors. Today’s CMOS processing technologies are highly optimized for making small, high-performance active components, or transistors. Options for on-chip passive components, including resistors, capacitors, inductors, and transformers, are limited. In particular, component values and quality of integrated passive components are very limited. Digital circuits are designed to work well without integrated passives, but analog circuits require quality passive components with a wide range of values. The ability to set passive component values electronically – to program them – would make possible a new kind of programmable analog circuit.
Radiation-hard, nonvolatile memory used in strategic parts of electronic systems offer increased responsiveness and reduced power consumption. A processor that uses nonvolatile memory for primary off-chip storage does not need to be “booted” after it is powered down; it can be powered back up in an “instanton” state, saving startup time and power. Nonvolatile magnetic tunneling junction memory can provide this “instanton” capability. The magnetic storage cells themselves consume no power when not being accessed, and are inherently radiation-hard.
The major elements of the project were to develop and optimize a functional magnetic storage cell; develop an optimized “free” layer, whose magnetic orientation can be easily switched by a magnetic field; develop a complete MTJ cell, incorporating the optimized free layer, whose resistance can be established by switching the magnetic polarity of the free layer; develop and model data storage circuits based on the MTJ cells; and integrate the MTJ cells into a CMOS process.
Two kinds of circuits were designed and simulated: a differential magnetic flip-flop and a magnetic shadow flip-flop. MTJs are placed between the P and N halves of a 4-transistor latch. The MTJs are programmed to opposite states. In case of a single-event upset, the flip-flop will restore the original state as follows: One of the signals, L or R, will fall faster than the other, due to the difference in MTJ resistance. Positive feedback will force the appropriate output, Q or QN, to be low. The MTJs provide resistor isolation for SEU immunity.
The specifications for the MTJ cells required for successful implementation of the magnetic latches are nominal resistance of 10 KΩ and a tunneling magnetic resistance (TMR) ratio of 15%. The preferred size and shape is an elongated PacMan, 1 μm in length. Integrating the MTJ cells onto a CMOS process proved elusive because of the difficulties in creating a metal surface smooth enough to accept the cells. This is necessary in order to carry out the next phases of the research, i.e., to develop accurate electronic circuit models, to implement the on-wire writing scheme, and finally, to integrate MTJ cells with CMOS electronics.
This work was done by Gregory W. Donohoe of the University of Idaho for the Air Force Research Laboratory. For more information, download the Technical Support Package (free white paper) at www.defensetechbriefs.com/tsp under the Electronics/Computers category. AFRL-0175
This Brief includes a Technical Support Package (TSP).
Magnetic Random Access Memory Integrated Passive Components
(reference AFRL-0175) is currently available for download from the TSP library.
Don't have an account? Sign up here.
Top Stories
INSIDERManned Systems
Turkey's KAAN Combat Aircraft Completes First Flight - Mobility Engineering...
INSIDERMaterials
FAA Expands Boeing 737 Investigation to Manufacturing and Production Lines -...
INSIDERImaging
New Video Card Enables Supersonic Vision System for NASA's X-59 Demonstrator -...
INSIDERManned Systems
Stratolaunch Approaches Hypersonic Speed in First Powered TA-1 Test Flight -...
INSIDERUnmanned Systems
Army Ends Future Attack and Reconnaissance Helicopter Development Program -...
ArticlesEnergy
Can Solid-State Batteries Commercialize by 2030? - Mobility Engineering...
Webcasts
AR/AI
From Data to Decision: How AI Enhances Warfighter Readiness
Energy
April Battery & Electrification Summit
Manufacturing & Prototyping
Tech Update: 3D Printing for Transportation in 2024
Test & Measurement
Building an Automotive EMC Test Plan
Manufacturing & Prototyping
The Moon and Beyond from a Thermal Perspective
Software
Mastering Software Complexity in Automotive: Is Release Possible...