Applying OpenVPX to Single Board Computers

For more than two decades, single board computers (SBCs) built on open standards have been largely based on specifications from two preeminent industry organizations, VITA and PICMG. For the 6U Eurocard format, each organization has developed a platform that has provided the basis for standardized SBCs; where VITA introduced the VMEbus standard and derivatives, PICMG introduced CompactPCI bus and its derivatives. Both bus structures use a parallel bus architecture, which has its performance limitations, hence the recent movement to use fabric-based technologies.

Figure 1. Multi-Gig-2 Wafer Based Connector

Updating hardware to include advancing technologies in embedded computing is nothing new, with the latest iteration being the incorporation of Intel and Freescale processor chipsets with internal serial bus interfaces into the SBC architecture. For PICMG, its original CompactPCI standard was followed by ATCA and MicroTCA, (albeit it in different form factors), where both new standards support serial fabric interconnects.

VITA started supporting serial fabrics with the release of VITA 41, or VXS, in 2006 followed by the ANSI ratification of VITA 46, or VPX, in 2007. The latest upgrade to the world of Eurocard form factor SBCs is the recently VITA/ANSI-approved OpenVPX, or VITA 65, based on VITA 46.0 and VITA 46.1.

A Legacy Continues

Originating from the VPX standard, OpenVPX provides a framework to build high performance, high power SBCs that incorporate the latest fabric-based technologies, including PCIe, one and ten Gigabit Ethernet as well as Serial Rapid I/O (SRIO). Applying this standard requires new thinking in the area of board-to-board interconnects, since the serial interfaces used require point-to-point interconnect between boards or, in other words, the use of central switching.

Designers using OpenVPX need to address the SBC interface design and board level interconnect, while taking into account the higher levels of throughput OpenVPX provides over the former bus architectures.

The OpenVPX standard supports the use of differential pairs of point-to-point interconnects, which replace the legacy parallel bus connection used on DIN connectors employed in the original VMEbus standard. OpenVPX provides SBC designers with the following features:

  • 3U or 6U form factor, 0.8" or 1.0" spacing;
  • Convection or conduction cooled formats;
  • Increased power;
  • High bandwidth differential interconnects up to 6.25 Gbps;
  • Profiles that describe module pin out and physical protocol;
  • Multi-topology support: mesh, star, dual-star signal planes;
  • Single or multi-plane architecture: control, data and expansion planes;
  • Several physical fabric protocols: PCI Express, Ethernet, SRIO, Aurora, etc.;
  • System management.
Figure 2. Examples of slot and backplane profiles

Table 1, which compares the features of VME, cPCI and OpenVPX, shows how OpenVPX is poised to lead designers into the next decade of embedded computing, versus using legacy architectures, even though all three support both 3U and 6U card sizes.

Putting OpenVPX into perspective, one lane of OpenVPX can exceed the bandwidth of an entire VMEbus system and is twice the bandwidth of a typical 32bit/33MHz cPCI bus. Because its data paths are typically organized as x4 links, OpenVPX allows performance that is roughly an order of magnitude higher than that of a basic cPCI bus. The multiple data paths in both the control and data plane provide enormous overall system bandwidth. It is analogous to packing tens to hundreds of cPCI or VMEbus systems into one chassis.

Defining the Serial Advantage

Figure 3. Block diagram of a dual core, dual FPGA-based 6U VPX processor

A major difference between VME, CompactPCI and OpenVPX is the connector. The connector (Figure 1) used in OpenVPX is rated for 10 Gb/s and uses installable wafers that support single ended and differential signals. To achieve high data rates, differential signals are primarily used.

In order to define the groupings of pins, VITA 65 has defined the concept of profiles. The standard includes three profile types:

  • Module for the boards;
  • Slot to show the organizations of the signals within the slot graphically;
  • Backplane to define the interconnection topology of the slots.

Slot profiles in VPX define the position of I/O lines within the connector. The signaling protocol, such as PCIe, along with the speed (i.e. 5 Gb/sec) is defined by the module profile. In order to support the devices used on today’s SBCs, several fabric protocols are available in OpenVPX. Table 2 depicts some fabrics specified by the module profile.

The backplane profiles, constructed by connecting slot profiles, are instances of interconnect schemes that implement various architectures, including central switched and distributed (Figure 2). Conventional mesh, star, and dual-star topologies are supported.

Harnessing The Power

OpenVPX provides much more power per slot than VME or CompactPCI. This is required to support today’s mulitcore processor chips and other devices like high-density FPGAs.

Table 1. Form Factor Comparison.

3U cards can use up to 276 watts when supplied from 12 volts; at only 3 volts, they consume up to 69 watts. 6U cards are allowed up to 384 watts per card when supplied from 12V and up to 115 watts per card when supplied by only 5 volts.

With these demanding requirements quickly becoming status quo, new standards like OpenVPX are necessary for SBC designers to keep pace with current — and future — board design requirements. The card in Figure 3 can consume 100 Watts and supports two Virtex 6 FPGAs, a dual core P2020 Freescale processor, two FMC mezzanine sites for high speed I/O and several Ethernet ports.

Designs like this are capable of performing signal processing in very dense FPGAs, which can each contain a softcore processor. FPGAs are capable of handling interfaces such as embedded 10 Gigabit Ethernet.

This VPX design example is complex, and can fulfill many applications due to the programmability of the FPGAs. By using FMC sites as front ends to the FPGAs, the design is very flexible and in this case the processor provides for off-board communication and local control. Cards like the one shown can be used in signal processing applications, like RADAR, electronic warfare or Sig-Int.

Higher Potential for Higher Processing

Table 2. Fabric bit rates.

OpenVPX provides a specification for SBC designers to build high power, and very high bandwidth processors, all on a form factor designed from the ground up to operate in rugged convection or conduction environments. This open specification defines several fabric protocols and supports switching. It provides the footprint and connector types to support mulitcore processors and high speed interfaces like 10 Gb Ethernet.

OpenVPX, is set to grow with the needs of the embedded computing industry allowing SBCs to be developed for military and aerospace applications, as well as many others.

This article was written by Ken Grob, Director of Business Development for Embedded Computing Products, Elma Electronic (Fremont, CA). For more information, contact Mr. Grob at This email address is being protected from spambots. You need JavaScript enabled to view it., or visit .