In-Memory Computing Chip Is a Processing Breakthrough for On-Device AI Applications

March 1, 2026

EnCharge AI, a California-based startup, recently launched the EnCharge EN100 artificial intelligence (AI) chip, developed with a scalable analog in-memory computing architecture.

The launch of EN100 came a year after EnCharge AI signed a partnership with the Defense Advanced Research Projects Agency (DARPA) to develop the new chip. The company describes EN100 as the industry’s “first AI accelerator built on precise and scalable analog in-memory computing.”

In developing the new chip, EnCharge has focused on fundamentally reshaping where AI inference happens, so that developers can deploy AI applications locally, with no dependence on cloud computing services.

EN100, the first of the EnCharge EN series of chips, features an optimized architecture that efficiently processes AI tasks while minimizing energy. Available in two form factors – M.2 for laptops and PCIe for workstations – EN100 is engineered to transform on-device capabilities:

The image shows the architecture for one of EnCharge AI’s in-memory computing chips. (Image: EnCharge AI)

Check out our Q&A session with Naveen Verma below, from his interview featured on the Aerospace & Defense Technology podcast .

Aerospace & Defense Technology (A&DT): What type of AI computing chip is EnCharge developing and how is it different from other AI chips?

Naveen Verma: It turns out that you may have heard or there’s been this concept out there in the industry when it comes to AI computing, around this thing called in-memory computing, in particular, analog in-memory computing. It’s a very important technology. It turns out that in AI compute, we really have a two-sided problem.

If you look at most of the state-of-the-art models that we’re trying to execute and deploy today, and that two-sided problem is the following. On the one hand, these models have an enormous number of operations, and so that means your compute technology has to be very efficient at essentially doing math. The other side of the problem is that it’s doing these operations on very large amounts of data, and it turns out that actually moving that data around on a chip, between chips, between modules on a chip becomes a big bottleneck.

And so the second critical aspect here is that we need to be able to manage that data movement very efficiently. And it turns out that in-memory computing is one of the very few architectures that can address both of these problems simultaneously. Essentially, what it does is it takes data, which is typically stored in memory, and it doesn’t move it out.

It does the computation right there on the data in the memory, and just moves out some of the key high-level results or outputs of that computation. And so in that way, it can solve a lot of problems. Now, the challenge is that you now need to shoehorn your compute inside the memory circuits, which are typically very tiny and very constrained, so that we can store large amounts of data.

EnCharge EN100, the industry’s first AI accelerator built on precise and scalable analog in-memory computing. Designed to bring advanced AI capabilities to laptops, workstations, and edge devices, EN100 leverages transformational efficiency to deliver 200+ TOPS of total compute power within the power constraints of edge and client platforms such as laptops. (Image: EnCharge AI)

A&DT: How does the way you’re designing your AI chip differ from the way chips are typically designed?

Verma: We build chips today using a technique called digital computing. And the idea behind digital computing is you essentially pretend that all your signals are either zeros or they’re ones. The reason you do that is you have something like 100 billion transistors on your chip, and if all of them have a little bit of noise, then it’s nice to have this large signal separation so that all of the transistors on your chip can work.

But you can imagine that by having this signal separation, we’re leaving a lot of efficiency and ability to represent signals kind of on the table. And so that’s what analog tries to do. It can recover all of that efficiency.

The problem now is you need to deal with the noise. And we had a big breakthrough in my lab back in 2017 around an approach to analog and memory computing that really solves that noise problem, the scalability problem, that sort of thing. And you know, I can go into the details if it’s helpful, but it’s a real transformation from the way that we think about both designing memories and around doing in-memory computing that relies on using these very precise devices that we can build inside the standard chips that are manufactured by companies like TSMC and Global Foundries and so on.

So that big breakthrough was really critical in my research. It allowed us to see that we can achieve very high levels of efficiency and do that practically. We built full architectures, scaled them up.

We built software, scaled them up, and we spent about five years doing that in the university. This was all funded by DARPA and DoD. It was supported by TSMC, who gave us access to silicon so that we could prove this thing out.

The chart provides a visual representation of how an in-memory computing chip works. (Image: EnCharge AI)

And then in 2022, after we had basically proven out not just the fundamental technology but also the architectures and software that would be needed for it, then we spun out the company, which is what EnCharge is today. And we’ve spent the last three years or so taking that architecture and that software, but now working with customers to understand what specific features need to be added into that hardware and that software to support their future roadmaps. And so that’s been the journey that we’ve been on so far.

A&DT: En100 is built on scalable analog and memory computing. How does your technology compare to traditional solutions like GPUs and FPGAs?

Verma: There are both important similarities and important differences. The important similarities are because we want to take this, you know, fundamental, transformative new technology, but we want to make it accessible in a way that doesn’t disrupt the way that people integrate computing technologies into their systems, the way that people design software for those technologies and so on.

So it’s really important to be similar in many ways, but then it’s important to be different as well, in order to be able to break through some of the limitations and challenges that we’re facing today. So the key way in which it’s different, as I mentioned, is this technology called in-memory computing. It turns out that 95 to 99 percent of the operations that we actually do in AI models that we’re deploying for real-time inference and other operations, it turns out that 95 to 99 percent of those operations are matrix multiplications.

And this is something that this particular technology can do with very high levels of efficiency. We’ve publicly reported chips that can do matrix multiplications with kind of an efficiency of 150 tops per watt. That’s, you know, something like 15 to 30x better than the best digital technologies can do that operation with.

Now, what’s important to recognize is that operation on its own, even though it’s 95 to 99 percent of the operations, doesn’t create full systems that people can actually use. In fact, you know, even though it’s such a dominant portion of the operations, a lot of the power and the area and all of those practical overheads go into other parts of the architecture. And so it’s very important for us to now take this technology and build it into an architecture that preserves as much of that efficiency as possible at the level of the actual user workloads and deployment methodologies across all of the different AI workloads that are relevant in the markets that we want to be able to address.

And so now we had to move to this architectural design, which had to be specialized to this computing technology, but also needed to fit, like I said, seamlessly into what users expect to be able to do and system integrators expect to be able to see and feel in terms of these chips. And so that required us to build a very unique and differentiated architecture that at its lowest level got the most out of this fundamental technology. But at its highest level, as you move toward software, looks just like those GPUs and other NPUs that you see in the industry, to the point where the software, which is the way that users actually access this technology, really looks identical.

A&DT: Are you still collaborating with DARPA, the Defense Department or any other defense organizations or companies?

Verma: Yes. I think defense applications have been a really important category of applications for us from the very beginning. It’s kind of really what drove the initial development of the technology.

And now as we’re reaching certain levels of maturity and starting to deliver chips into the industry, we found many other use cases as well. But military and defense applications are a key driver for what’s needed here. As you know very well, the military needs to be, you know, sort of aggressive in how it thinks about the future of warfare and the battlefield environment.

And we need to be that way because, of course, our adversaries are being equally aggressive. And so we are deeply involved today with DoD and also various defense contractors who are delivering and conceptualizing the next generation systems. And the need for more and more advanced AI is just very apparent.

The need for autonomy in the kinds of systems that are deployed is critical. The need for those autonomous systems to interact with human users in ways that are natural and effective, operationally effective, is very critical. So you can imagine systems that need to be able to react to very complex environments in the battlefield and be able to make their own sense of how they should respond.

But that should also be able to take commands and inputs from human users so that the overall responses are very coordinated and optimal and controlled. And all of that really aligns well with the kinds of capabilities that AI is introducing. As we look to the most state-of-the-art AI, we’re seeing very advanced reasoning capabilities across multiple modalities of sensors whether that’s vision, whether it’s audio, whether it’s natural language interfaces from humans, and things like that.

So we’re seeing these models that certainly can provide the kinds of capabilities that we can imagine would be very relevant in defense applications. The question is, how do you start to deploy those advanced models within these defense systems in particular that are often in network-limited or constrained environments, that are often in battery-powered cases where power consumption is also critical? That’s where AI computing technologies are needed that can operate entirely at the edge and that can do so very efficiently while supporting these very advanced models with these kinds of defense-relevant app capabilities.

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