Heterogeneous Integration and SiPs Benefit SWaP-C Reduction

February 1, 2023

System-on-chip devices developed using intelligent integration can provide aerospace and defense electronics systems that meet challenging SWaP-C goals.

Aerospace and defense (A&D) electronic systems are being made smaller but more functional. This is possible because of industry-wide efforts to reduce the size, weight, and power as well as cost (SWaP-C) of electronic components, especially though heterogeneous integration such as by combining analog, digital, and mixed-signal circuits, and components. Intelligent integration can provide A&D systems and subsystems in the forms of system-in-package (SiP) and system-on-chip (SoC) devices that help meet challenging SWaP-C goals without compromising functionality and/or performance. While SiP devices may not provide all SWaP-C solutions, they can help add A&D electronic functionality to a growing number of applications designed to fit smaller sizes, such as portable mission-critical communications and unmanned aerial system (UAS) applications.

Integrated circuits (ICs) have historically played important roles in shrinking the size of circuits for A&D systems and many other electronic applications. SiPs and SoCs can be thought of as multiple ICs in the same package, carefully combined to work together. Where the components required for one major system function could once be fabricated as a single-function IC such as an RF/micro-wave transmitter or receiver, the greater functional density of a SiP or SoC enables the fabrication of multiple functions within a highly integrated device that can be housed within a single, multiple-pin or lead package. The effectiveness of modern semiconductor processes and packaging technologies now makes it possible to enclose multiple-function highly integrated devices within a package that is smaller and lighter than what once held a single IC.

Since many analog and digital circuit functions are often required within A&D electronic systems, heterogeneous integration of SiPs and SoCs enables design and fabrication of devices which combine analog and digital functions as portions of mixed-signal circuits containing components based on different technologies, such as analog amplifiers, filters, frequency mixers, local oscillators (LOs), analog-to-digital converters (ADCs), and digital-to-analog converters (DACs).

Increasing availability of multiple-function SiPs leads to decreasing SWaP-C for those functions within A&D and other electronic systems. Since many A&D systems rely on digital signal processing (DSP) to extract actionable data from signals collected as part of surveillance actions, those systems inevitably employ multiple ADCs and DACs to shift intercepted surveillance signals between analog and digital signal realms.

Just as adoption of ICs resulted in a savings of PCB area and power compared to circuits based on discrete components, SiPs and SoCs enable significant savings in circuit area and power consumption compared to packaged ICs. SiPs and SoCs represent an evolution in reducing the SWaP-C of critical systems, especially those designed as part of mobile or portable electronic platforms in mission-critical and tactical systems.

Savings with SiPs

SiPs and SoCs offer many benefits for circuit designers chasing strict SWaP-C goals. Compared to multiple ICs and especially discrete-component circuit configurations, packaged SiPs and SoCs can provide equivalent or greater functionality in a fraction of the PCB area. While the power-supply circuitry feeding a multiple-function SiP or SoC may not differ a great deal from the supply lines for biasing separate analog and digital ICs, the power consumption of the two approaches can differ a great deal. The amount of power consumed by SiPs for the equivalent functionality of multiple ICs is typically much less, with a more efficient, less complicated path from the power supply to the active device.

Modern A&D electronic applications are inevitably a combination of analog and digital signal components linked by several interfaces for control. Multiple ICs and components within the signal chain of a mixed-signal circuit require mixed-signal interfaces designed as part of the PCB, interconnecting separate ICs; the equivalent mixed-signal interfaces are integrated within the package of a SiP or SoC so that mixed-signal interfaces are not needed on the PCB at the transmission-line stage. Because multiple data converters can be integrated within a single SiP or SoC package, the high-pin-count interconnections linking multiple discrete data converters on a PCB can be eliminated or minimized, simplifying the PCB layout.

The inclusion of critical data converter interfaces within SiP and SoC packaged devices results in more than just simpler PCB circuit layouts; it can deliver the high performance needed by many A&D circuits and systems. In the frequency domain, matched and tightly controlled amplitude and phase of multichannel signal paths, such as for phase-locked loops (PLLs) in frequency synthesizers or active phased-array antennas in radar systems, is critical, especially with variations that occur over wide operating temperature ranges. In the time domain, signal synchronization is essential for proper inter-system communications and can also be disrupted by the wide temperature ranges to which A&D systems are subjected.

When data interfaces are contained within a SiP or SoC package, temperature variations in amplitude, phase, and timing can be more readily controlled than when board-level serial interfaces interconnect individual ICs. In traditional transceiver applications, those external interfaces must be carefully controlled in length since the length of each line accounts for its phase and timing characteristics in addition to any system-level latency in the total signal paths. In contrast, with highly integrated SiP or SoC transceivers, simpler circuit layouts can be employed since it is possible to include digital signal processing (DSP) in the form of digital filters to correct for phase anomalies caused by unmatched line lengths between channels of the transceivers.

Compared to A&D circuit solutions constructed with ICs and discrete components, approaches developed with SiPs and SoCs can also be cost savers. The functionality of a SiP must be well-matched to the application for high efficiency and cost-effectiveness, such as a device with multiple transceivers for an RF/microwave radio front-end circuit solution. But with the proper match, the required functionality and performance can often be met with minimal additional ICs and components (at minimal cost), such as a microprocessor and power supply suitable for proper operation of the SiP.

The high circuit density of SiPs in miniature housings with high pin/lead counts requires PCBs designed around that package configuration. One concern with such high circuit density in such small packages is in maintaining suitable signal integrity (SI) — typically gained by adequate isolation between active devices within the SiP housing and between the circuit interconnections made to the SiP package leads. The choice of PCB substrate material and its key parameters, such as dielectric constant (Dk) and dissipation factor (Df) or loss, contributes strongly to achieving desired SI levels especially in high-frequency, high-speed mixed-signal SiPs with closely spaced package interconnections.

High-density SiPs often require PCB interconnections to signal lines with amplitude- and phase-matched interconnections, such as microstrip, stripline, or coplanar-waveguide (CPW) transmission lines within the PCB and coaxial cable assemblies between multiple PCBs. The transmission lines require suitable isolation to minimize crosstalk between channels as well as spurious and harmonic signal generation, and low enough loss characteristics to support effective thermal management and minimum electrical performance degradation due to temperature variations.

Examining Examples

Figure 1. This mixed-signal 2 × 2 SiP transceiver has a frequency range of 30 MHz to 6 GHz and fits within a 196-ball CSP_BGA package measuring 12 × 12 mm. (Image: Analog Devices)

How much functionality is available for an A&D system from a single SiP? Two miniature systems from Analog Devices demonstrate the impressive functional capabilities from a single packaged device. Model ADRV9002 SiP is a mixed-signal, 2 transmitter × 2 receiver transceiver SiP with complete receiver and transmitter subsystems capable of channel bandwidths from 12 kHz to 40 MHz across a frequency range of 30 MHz to 6 GHz. It is housed in a 12 × 12 mm, 196-ball CSP_BGA package (Fig. 1). This transceiver SiP is fully programmable via a four-wire serial peripheral interface (SPI) and is available with optional low-voltage differential signaling (LVDS) and CMOS synchronous serial data interfaces. Its mixed-signal architecture (Fig. 2) provides linear direct conversion of radio signals, aided by quadrature error correction (QEC) and programmable digital filters. General-purpose input and output ports are provided for monitoring and control.

Figure 2. The layout of the 2 × 2 transceiver shows how mixed-signal processing can deliver narrowband and wideband transmission and reception over a wide frequency range. (Image: Analog Devices)

Figure 3. This 324-ball BGA measures just 15 × 15 mm but contains four high-speed ADCs, four DACs, and supporting integrated circuitry. (Image: Analog Devices)

The large number of package pins requires a thoughtful circuit layout on the host PCB, but those interconnections result in components being inside the SiP and its package rather than externally mounted on the PCB. The single packaged SiP contains two fully integrated fractional-N frequency synthesizers and phase-locked loops (PLLs). All VCO and loop filter components are fully integrated within the SiP to minimize the external component count (and SWaP-C). The SiP can execute direct frequency conversion and fast frequency hopping among other advanced radio techniques while saving the space of many discrete ICs on the host PCB.

The other SiP, the model AD9081, has a more complicated architecture, with four high-speed, high-resolution ADCs and four DACs in a larger 324-ball BGA package measuring 15 × 15 mm (Fig. 3). The ADCs and DACs work with a JESD204B or JESD204C interface, the DACs at sample rates to 12 GSamples/s and the ADCs at sample rates to 4 GSamples/s over a full-power 3-dB analog input bandwidth of 7.5 GHz. Ideal for processing signals with wide instantaneous bandwidths, this data converter SiP can help meet SWaP-C goals in broadband communications equipment, phased-array radars, EW systems, and test equipment (Fig. 4). The versatile device incorporates an on-chip PLL for synchronizing multiple devices, an on-chip clock multiplier, and on-chip temperature compensation to maintain consistent performance over wide operating temperatures.

Figure 4. Integration of four ADCs and four DACs into one SiP enables board-level miniaturization for many applications, including broadband communications equipment, phased-array radars, EW systems, and test equipment. (Image: Analog Devices)

These two SiPs are examples of how much functionality can be contained within a single package rather than “across the board” as in the PCB. Of course, designing with SiPs and SoCs and their multipin packages requires planning for circuit layouts but can lead to smaller, lighter circuits and highly integrated functionality while meeting the strictest SWaP-C goals.

This article was written by Bryan Goldstein, Vice President, Aerospace & Defense, Analog Devices. For more information, visit here .