MOSA Enclosure Design for Military Systems
Embedded enclosure design for manned and unmanned systems continues to bring new complexities to light. There are recognizable trends that are driving these challenges. First, Modular Open Standard Architectures (MOSA) are popular for their inherent advantages of an open, multi-vendor system. They are the framework for SOSA™ (Sensor Open Standard Architecture) which is widely mandated for projects in the tri-service community.
The push to reduce SWAP – Size, Weight, and Power (and even add a “-C” for Cost) is not likely to ever diminish and remains a key trend. SWAP-C is important for both small and large systems. The high-performance requirements of today’s applications are preventing the size of the system from reducing in many cases. It’s hard to reduce the size of the system when you want to continually boost performance – often by utilizing high wattage processors and modules loaded with a lot of RF and I/O interfaces. In fact, combining formerly separate systems for command/control, data processing, up/down conversion and RF modulation, has pushed several designs into larger enclosure size envelopes. Advanced processing for artificial intelligence (AI) and cybersecurity are also key elements, driving the push for innovation.
Let’s take these trends of MOSA/SOSA, SWaP, and processing power one at a time. SOSA, for example, has various board and backplane routing/interface “profiles” that ensure that a module will work within a certain backplane routing design for that slot. The profiles often incorporate OpenVPX boards with speed capabilities up to 100GbE and PCIe Gen4. The plug-in modules and backplane often support VITA 66.x and 67.x optical and RF interfaces. These high speeds make the backplane design more challenging, even moreso when there is less routing space available with the VITA 66/67 blocks taking up PCB real estate. The I/O from the VITA blocks also bring cabling and panel space concerns for the enclosure.
There have been recent designs where the chassis designer has had to make the enclosure a little taller or deeper to enable enough I/O space, even with the latest small form factor interfaces. Further, depending on the chassis approach, these cables could block airflow in a rackmount chassis. Jamming more functionality into a limited space in a pod that may reside on an airframe, ship, tank or an unmanned system brings even more “chassis real-estate” concerns. Adding in the high-power processors bring thermal challenges for the chassis. A larger enclosure would make life easier for the chassis designer, but the constant drive to reduce SWaP-C or working within the existing space constraints of the pod may limited their options.
While many of the MOSA systems are in a larger enclosure size, let’s start with the smaller systems for applications with limited space or with basic pod system functionality. First, the small unmanned MOSA enclosure typically just has 2-6 slots of 3U OpenVPX or SOSA aligned (more on SOSA later) boards. OpenVPX and SOSA implementations thereof have become the de-facto architecture standard for backplane-based defense systems.
6U OpenVPX is also an option and it is a common approach in space applications, but 3U is more prevalent. Often, these systems will have 1-2 processors, a switch, and may have another special RF, storage, or other device. Fortunately, the processing requirements in these systems often do not require power-hungry chipsets. Therefore, these can be utilized on a cold plate for a ½ ATR (Austin Turnbull Radio or Air Transport Rack).
As a rule of thumb, you can cool approximately 40-50W per slot in these OpenVPX architecture designs with the boards not exceeding 70°C at the card edge (many are designed for up to 85°C or beyond) without a cold plate. This natural convection approach is still popular for many small systems. For those applications utilizing a little more power, a cold plate is a common solution. Utilizing a cold plate, one can cool roughly 75W/slot, depending on the application specifics.
For the small systems with a little more processing power, a cold plate approach is often employed. Figure 1 shows a model of a 5-payload slot +1 VITA 62 PSU slot size 3U OpenVPX enclosure in a ½ ATR size. This side view shows how the I/O interfaces with the MIL-38999 connectors can be on both the front and rear, helping to solve the I/O real-estate issue. The cold plate helps dissipate the heat with fins helping to conductively spread the heat from the chassis. Increasingly, these boards will have speeds to 40 GbE across the backplane. In some SOSA designs, 100 GbE speeds are required. The data acquisition boards will sometimes have 1-2 VITA 67.3c or other RF/optical interfaces to the front panel of the ATR.
As mentioned earlier, SOSA is becoming the design path for the dense service community for embedded computing. The military continues to seek out the cost, lead-time, multi-vendor, and lower risk benefits of modular open standard architectures. They have since pushed standardizing on SOSA-based profiles to reduce integration, service/training times as well as increasing commonality across platforms and inherent cost savings. SOSA has featured its platform around VITA’s OpenVPX architecture.
In applications with a little more available space, there is often either more processors and FPGAs, or the introduction of graphics processing with powerful GPGPUs and higher wattage complementary boards. Cooling these systems without airflow (or liquid) becomes less feasible in the latter case. The high wattage designs typically have fans (or a system in the pod that provides the airflow) that pull airflow over the cooling fins, while the boards are safely sealed inside. These chassis often have 7-12 slots, with one or two of the boards as VITA 62 PSUs. These types of designs are commonly SOSA aligned, with backplane speeds to PCI Gen 4 of 100 GbE. Some future designs are looking at PCIe Gen5, which has 32 Gbps signals, requiring the next generation of MultiGig connector. Precision timing is a factor in these systems where GPS or NTP (Network Time Protocol) is critical, and a timing slot is a standard option in some SOSA profiles. The thermal management for these systems can be daunting. Figure 2 shows thermal simulation for a 12-slot OpenVPX chassis for 3U boards with cooling requirements of at least 800W in a MIL-rugged environment of -40°C to +70°C. In order to meet the cooling levels, thicker walls and optimized fin sizes can be calculated to reduce hot spots in the enclosure. The VPX/SOSA-aligned chassis manager(s) can be placed below the backplane so that slots space is not consumed. These chassis managers provide a significant number of I/O options for MP, Ethernet, IPMB, GPIO, analog, etc., in a higher slot count system. The space beneath the backplane also allows for bend radius of VITA 66/67 cabling.
Air Flow Through and Air Flow By are other thermal management variations for MOSA systems requiring advanced cooling. The VITA 48.8 standard provides for the ability for air to flow through the module itself, providing a more efficient cooling approach. This type of design is for very high-power modules that may well be over 200W each.
Figure 3a shows a custom chassis for 6U VPX boards that leverage that standard and Figure 3b is a close-up of the Air Flow Through card mat. While this approach is more commonly employed in a rackmount chassis, an ATR style is also possible. Air Flow By is a simpler approach where the module itself has fins for airflow to pass over. Essentially, the module design incorporates a heatsink with fins into the board’s shape.
The demanding requirements of SOSA have brought new thermal, I/O, and routing challenges to backplane/ enclosure manufacturers. The ubiquitous desire to minimize SWaP-C, no matter the size of the system adds further difficulties to overcome. But as we have seen, there are many creative solutions that can guide a path through the obstacles in OpenVPX/ SOSA chassis design.
This article was written by Justin Moll, Vice President of Sales & Marketing, Pixus Technologies (Waterloo, ON, Canada). For more information, go here .