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FPGAs and HPC

A study conducted to determine how suitable Field Programmable Gate Arrays (FPGAs), which are well suited for applications involving bit manipulations performed on a continuous stream of data, are for for use in high performance computing (HPC) applications.

FPGAs are devices programmed using languages and methodologies originally developed for describing the circuit layouts used in today’s integrated circuits. As such, they are well suited for applications involving bit manipulations performed on a continuous stream of data. However, their general applicability to HPC applications is open to debate.

Xilinx Virtex FPGA

An FPGA is a chip designed to emulate a user-specified integrated circuit. As such, FPGAs can be very useful in prototyping efforts. More recently, they have been incorporated into add-on boards which frequently consist of the following:

  • One or more FPGAs

  • A small to moderate amount of fast memory (static random access memory [SRAM])

  • Optionally a larger amount of dedicated onboard memory (dynamic random access memory [DRAM])

  • An interface for connecting the board to the system that will be hosting it. At the time this research was conducted, that was based on either the peripheral component interconnect (PCI) or the peripheral component interconnect extended (PCI-X) standards

During the period when this research was conducted, Xilinx and Altera were the major manufacturers of the FPGAs. Many of their products included additional features such as the following:

  • A small amount of on chip fast memory

  • A complete embedded PowerPC processor

  • Specialized circuitry such as analog-to-digital converters

  • Digital signal processor (DSP) slices, from which entire DSPs and other types of computational units could be efficiently constructed.

At the time this research was conducted, there were many uses for FPGAs and most of them had nothing to do with high-performance computing (HPC). Examples of non-HPC applications for FPGAs include the following:

  • Replacing application specific integrated circuits (ASICs) in a design in an attempt to reduce the time to market.

  • Replacing ASICs in a low volume product in an attempt to save money (ASICs are cheaper, but only when ordered in quantity).

  • Temporarily replacing ASICs (or possibly even the processor itself) during the design phase of a project. This makes it easier to test out the merits of alternative designs before committing to one.

  • Accelerating applications that are primarily composed of a large number of bit manipulations, including signal and image processing and cryptography, which can all be HPC applications under the correct circumstances.

  • Simulating networks, which would otherwise be an HPC application.

  • Simulating ASICs prior to their production.

It was determined that FPGAs may be applied to HPC applications in the following distinct ways:

  • The acceleration of bit manipulations (as just mentioned)

  • Integer calculations

  • Fixed-point (i.e. decimal) calculations

  • Floating-point calculations using dedicated adders, multipliers, and/or fused multiply-add units. These may be formed entirely from reconfigurable cells, or they may be formed from DSP slice technology combined with glue logic created out of reconfigurable cells.

  • Floating-point calculations using soft implementations of embedded microprocessors.

This work was done by Daniel M. Pressel for the Army Research Laboratory. For more information, download the Technical Support Package (free white paper) below. ARL-0245

Topics:
Aerospace Board-Level Electronics Cryptography Data acquisition and handling Electronic Components Electronic equipment Electronics Electronics & Computers Integrated circuits Semiconductors & ICs Signal Generators
This Brief includes a Technical Support Package (TSP).
Document cover
FPGAs and HPC

(reference ARL-0245) is currently available for download from the TSP library.

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    Magazine cover
    Aerospace & Defense Technology Magazine

    This article first appeared in the February, 2022 issue of Aerospace & Defense Technology Magazine (Vol. 7 No. 1).

    Read more articles from this issue here.

    Read more articles from the archives here.

    Overview

    The report titled "FPGAs and HPC" by Daniel M. Pressel, published in January 2007 by the U.S. Army Research Laboratory, explores the role of Field Programmable Gate Arrays (FPGAs) in the realm of High-Performance Computing (HPC). Covering the period from October 1, 2005, to September 30, 2006, the report provides a comprehensive analysis of the current uses of FPGAs and their potential applications in HPC.

    FPGAs are specialized hardware devices that can be programmed to perform specific tasks, making them particularly well-suited for applications that require efficient bit manipulation on continuous data streams. The report discusses the advantages of FPGAs, such as their flexibility and ability to be reconfigured for different tasks, which can lead to significant performance improvements in certain computational scenarios.

    However, the report also addresses the ongoing debate regarding the general applicability of FPGAs to various HPC applications. It highlights several factors that influence the effectiveness of FPGAs in solving different classes of problems, including the nature of the computational tasks, the architecture of the FPGA, and the programming methodologies used. The document emphasizes the importance of understanding these factors to determine when FPGAs can outperform traditional microprocessors.

    The report is structured into several sections, beginning with an introduction to FPGAs and their uses, followed by a detailed examination of how HPC applications can be mapped to FPGA architectures. It includes a comparison of the peak performance of FPGAs versus microprocessors, providing metrics to understand the performance differences. Practical guidelines for utilizing FPGAs in HPC applications are also discussed, along with insights into non-HPC applications of FPGAs.

    In conclusion, the report synthesizes the findings and offers insights into the future of FPGAs in high-performance computing. It acknowledges the support of the U.S. Army Research Laboratory and the Department of Defense High Performance Computing Modernization Program, as well as contributions from various individuals in the field. The document serves as a valuable resource for researchers and practitioners interested in the integration of FPGAs into HPC environments, providing a balanced view of their capabilities and limitations.

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