Nanofabrication Technology for Production of Quantum Nano-Electronic Devices Integrating Niobium Electrodes and Optically Transparent Gates

Devices created using this technology could be used for control and sending of qubit/quantum memory states to remote locations.

Figure 1. High resolution scanning electron microscopy of a full device in microwave ground-signal-ground layout (a), the case of a closed tunneling junction region (b), open (c), and open tunneling junction (d).

February 1, 2021

Naval Research Laboratory, Arlington, Virginia

Niobium metal is used in the implantation of a variety of superconducting quantum devices.

However, the technology is typically limited to use in conventional Josephson junctions based on Nb-AlOx-Nb produced entirely by sputtering. In addition, the devices are most commonly in a vertical stack covered by niobium metal, making it physically limited to access the embedded films that could comprise insulators, semiconductor, or hybrids with ions.

There is a need for improvement in the design as well as integration of functional materials for use in devices such as qubits as well as ion embedded devices for quantum memory. Also, implementation of large-scale computers requires nanofabrication technologies. Sending qubits states and implementing quantum networks requires an optical interface. This research presents nanofabrication processes and results that address these needs and challenges.

Certain applications require the ability to gate the active region and use multi-terminal configurations. The previously designed heterostructures with the top niobium electrode have a problem with this as their optical gating limits access to the active junction region. A layout was created for the construction of lateral devices where tunneling can occur. That led to a modified layout based on microwave integrated circuit ground-signal-ground layouts used for radio frequency (RF) electronics. The active region was modified to act as a tunneling junction. As for the tunneling junction, structures were produced that have a “closed” but constricted gap at or near the coherence length for niobium to behave as a weak-link and where functional materials can readily be integrated in the tunneling region.

The starting material was 4-inch silicon wafers with 300 nm of thermal SiO₂. One hundred nm of niobium was DC sputtered in the presence of argon at 200 watts. The samples were pattered and developed with ma-N 2405 electron beam negative resist and exposure with a Vistec Electron Beam lithography system. Dose tests measured optimal exposure conditions.

After dose testing, resist development and bake SF6 etching was done to define the lateral niobium nanoscale patterns, followed by two cycles of O₂ plasma etching and SF6 etching to clean the surface. Layouts were developed in a complete microwave layout as shown in Figure 1a where the device is arranged in a ground-signal-ground configuration. The layout was made where the gap region of the active tunneling junction was varied from closed configurations in Figure 1b to opens in Figure 1c and 1d with varying gap length. The open junctions were formed specifically to enable deposition of novel functional materials in the tunneling gap region, such as a S-B-I-B-S structure previously examined, or other structures as desired by the application.

After patterning of the niobium, a second exposure was completed to define indiumtin-oxide gate electrodes (ITO) by a lift-off process. The aligned exposure was assisted by the formation of alignment markers during the previous lithography step. Polymethyl methacry-late (PMMA) positive resist was used as the resist and dose tests were completed to optimize the exposure conditions.

Figure 2. High resolution scanning electron microscope images of gate electrode in the vicinity of the tunneling junction (a), close ups of a gate electrode over a closed gap (b), gate electrode over an open gap (c) and gate electrode in an open gap (d).

After the resist development and bake, a 2-second descum oxygen-plasma exposure was performed, followed by RF sputtering at 100 watts in argon of indiumtin-oxide (ITO) and subsequent lift-off in acetone using standard lift-off procedures. Figure 2 shows completed structures with nanowire gate widths down to sub-100 nm dimensions that are well positioned over the tunneling junction.

This work was done by Osama Nayfeh and Dave Rees of the Naval Information Warfare Systems Command (formerly SPAWAR). For more information, download the Technical Support Package (free white paper) below. SPAWAR-0007